1. Technical Field of the Invention
The invention relates generally to memory storage devices; and, more particularly, it relates to error correction coding implemented within such memory storage devices.
2. Description of Related Art
As is known, many varieties of memory storage devices (e.g. disk drives), such as magnetic disk drives are used to provide data storage for a host device, either directly, or through a network such as a storage area network (SAN) or network attached storage (NAS). Typical host devices include stand alone computer systems such as a desktop or laptop computer, enterprise storage devices such as servers, storage arrays such as a redundant array of independent disks (RAID) arrays, storage routers, storage switches and storage directors, and other consumer devices such as video game systems and digital video recorders. These devices provide high storage capacity in a cost effective manner.
Within such hard disk drives (HDDs), error correction coding (ECC) is sometimes employed to ensure the ability to correct for errors of data that is written to and read from the storage media of a HDD. The ECC allows the ability to correct for those errors within the error correction capability of the code.
When performing decoding processing according to certain software based ECC approaches, the operations are oftentimes performed serially. For example, one computation is performed at a time and many processor operations are required per computation. For example, multiple processor operations can be required to perform a single computation within the decoding processing. The amount of time (and power) required to perform software based ECC corrections is extreme. Most prior art approaches perform all ECC correction in hardware because of the high cost of software based ECC correction. However, as the size of HDDs continues to grow, the associated cost to perform hardware based ECC correction will continue to grow.
In the HDD technology space, the amount of time (and power) required to perform software based ECC corrections is sometimes so large that many disk drive systems revert to retries as an earlier step in error recovery rather than perform the costly software ECC correction. Because of this, many designs simply will not implement software based ECC correction.
When such ECC correction processes are time and/or power consumptive, this competes can compete directly the performance of such a device. This can result is significant degradation in performance of a device given the high power consumption and/or the relatively slow response time (because of the many operations required to be performed when doing ECC correction). This high energy consumption of the ECC correction comes at the expense of the requisite energy required for other modules and/or processes within the device. Within battery powered devices (e.g., laptop computers when operating on battery power, hand-held devices, etc.) this can be extremely deleterious in terms of performance.
There exists a need in the art for a better, more efficient means of performing many of the various calculations that are performed during error correction decoding within such devices.